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BCD to Binary Convertor

In digital electronics, Binary Coded Decimal (BCD) is a binary encoded decimal representation of a number. It is commonly used in applications such as calculators, digital clocks, and other devices that require accurate decimal arithmetic. Today, we will discuss how to design a Binary to BCD converter using Verilog language.

A Binary to BCD converter is a digital circuit that takes a binary input and converts it into its equivalent BCD form. The BCD form consists of four bits, representing each digit of the decimal number. For example, the decimal number 25 is represented as 0010 0101 in BCD form.

Also note, this is a simplest way to generate bcd to binary convertor and multiple other methods are very common.

Verilog code :

Also find code at: https://edaplayground.com/x/vM_q

The above Verilog code defines a module binary_to_bcd_converter that takes a 4-bit binary input binary and outputs a 12-bit BCD value bcd. The always block is used to generate the BCD output based on the input binary value.

The case statement checks the input binary value and assigns the corresponding BCD value to the output bcd. If the input binary value is not in the range of 0 to 9, the output bcd is assigned a value of xxxx_xxxx_xxxx, which indicates an invalid input.

Testing the Binary to BCD Converter

To test the Binary to BCD converter, we can create a testbench that generates different input binary values and checks the output BCD values. The Verilog code for the testbench is as follows:

This testbench uses a clock generator to provide timing for the design under test (DUT). The binary input is driven by a sequence of values, and the output bcd is monitored using the $monitor system task.

The initial block starts by setting binary to the first input value of 0, and then changes it to each of the values from 1 to 9 in sequence with a delay of 10 time units between each change. After the last input value is applied, the simulation is finished using the $finish system task.

The clock driver generates a square wave with a period of 4 time units, and is used to synchronize the operation of the DUT with the testbench.

Code can be found at: https://edaplayground.com/x/vM_q