Explain fetch - decode - execute in processor

Audience: Fresher to 2-3 years

Companies: startups working on RISCV, arm, intel

The fetch-decode-execute cycle is a fundamental process that occurs within a processor, where instructions are fetched from memory, decoded to determine the operation to be performed, and then executed by the processor. Let's illustrate this cycle using an example of a chocolate factory.

Fetch: In the fetch stage, the processor retrieves the next instruction from memory. In our chocolate factory example, let's say there is a set of instructions stored in a recipe book, and each instruction represents a step in the chocolate-making process.

The processor fetches the first instruction from the recipe book and brings it into its instruction register, a temporary storage unit within the CPU. This instruction is typically represented as a sequence of binary digits that the processor can interpret.

Decode: Once the instruction is fetched, the processor moves to the decode stage. Here, the instruction is analyzed and decoded to determine the specific operation or task it represents. The control unit within the CPU interprets the instruction and extracts relevant information such as the type of operation, memory addresses, and data involved.

In our chocolate factory example, let's say the fetched instruction is "Melt chocolate in a mixing pot." The control unit decodes this instruction, recognizing that it is a command to melt chocolate and identifying the mixing pot as the target container.

Execute: After decoding, the processor proceeds to execute the instruction. In this stage, the necessary operations are performed based on the decoded instruction. The ALU (Arithmetic Logic Unit) within the CPU may perform mathematical calculations, logical operations, or data manipulations, depending on the instruction.

Pseudocode of fetch:

// Initialize program counter (PC) to the starting memory address
PC = initial_memory_address

// Fetch cycle
instruction = memory_fetch(PC) // Fetch the instruction from memory at the current program counter address
PC = PC + instruction_size // Update the program counter to point to the next instruction

// Update instruction register
instruction_register = instruction

// Increment instruction pointer
instruction_pointer = instruction_pointer + 1

// End of fetch cycle

Pseudocode for Decode:

// Decode cycle
opcode = extract_opcode(instruction) // Extract the opcode from the fetched instruction
operands = extract_operands(instruction) // Extract the operands from the fetched instruction

// Decode the opcode and perform appropriate operations
switch (opcode) {
case ADD:
perform_add_operation(operands) // Perform addition operation using the operands
break
case SUB:
perform_subtraction_operation(operands) // Perform subtraction operation using the operands
break
case MUL:
perform_multiplication_operation(operands) // Perform multiplication operation using the operands
break
// Handle other opcode cases
// ...
default:
handle_unknown_opcode() // Handle unknown or unsupported opcode
}

Pseudocode for Execute:

// Execute cycle
switch (opcode) {
case ADD:
result = operand1 + operand2 // Perform addition operation
break
case SUB:
result = operand1 - operand2 // Perform subtraction operation
break
case MUL:
result = operand1 * operand2 // Perform multiplication operation
break
// Handle other opcode cases
// ...
default:
handle_unknown_opcode() // Handle unknown or unsupported opcode
}

// Store the result of the operation in the destination register or memory
store_result(result)

// End of execute cycle